An MMU means I can just throw a stripped Linux + busybox + sqlite db on the board and prototype in a weekend instead of wrestling with yet another RTOS. Curious if the Baochip toolchain will make it painless to cram a static Go binary into the on-board flash or if we still need external SPI flash for anything non-trivial.
A static Go binary for riscv64 starts at ~3 MiB and balloons past 10 MiB once you import net/http, so unless Baochip has north of 16 MiB on-die flash you will still be hanging SPI NOR off the side. The neat MMU trick is that, with a PIE build and a suitably patched kernel, you can demand-page the text straight from XIP flash and never copy it into RAM, but we will have to see if their toolchain wires that up.
It's more than that. If you e.g. want to run and truly profit of a microkernel system, an MMU is fundamental. There are microkernel variants like e.g. F9 which work with an MPU instead, but it is significantly limited. For example, the ESP32-P4 is a pretty powerful Risc-V microcontroller, but which has no MMU. It works for operating systems like the Oberon System which doesn't assume an MMU, but not e.g. for sel4. We will likely not see ARM microcontrollers with MMUs for strategic reasons. So it makes sense that Risc-V based manufacturers go into this field.
An MMU means I can just throw a stripped Linux + busybox + sqlite db on the board and prototype in a weekend instead of wrestling with yet another RTOS. Curious if the Baochip toolchain will make it painless to cram a static Go binary into the on-board flash or if we still need external SPI flash for anything non-trivial.
A static Go binary for riscv64 starts at ~3 MiB and balloons past 10 MiB once you import net/http, so unless Baochip has north of 16 MiB on-die flash you will still be hanging SPI NOR off the side. The neat MMU trick is that, with a PIE build and a suitably patched kernel, you can demand-page the text straight from XIP flash and never copy it into RAM, but we will have to see if their toolchain wires that up.
It's more than that. If you e.g. want to run and truly profit of a microkernel system, an MMU is fundamental. There are microkernel variants like e.g. F9 which work with an MPU instead, but it is significantly limited. For example, the ESP32-P4 is a pretty powerful Risc-V microcontroller, but which has no MMU. It works for operating systems like the Oberon System which doesn't assume an MMU, but not e.g. for sel4. We will likely not see ARM microcontrollers with MMUs for strategic reasons. So it makes sense that Risc-V based manufacturers go into this field.